1. Field of the Invention
The invention relates to a method of forming a gate, and more particularly, to a method of forming a stack-gate of a non-volatile memory.
2. Description of the Prior Art
A metal oxidation semiconductor (MOS) transistor is used as a non-volatile memory in an integrated circuit. Storage of data in memory is accomplished by switching the gate on or off. Switching the gate on or off is regulated by the use of different threshold voltages. Even if the power source is switched off, the data stored in the memory is retained. The standard stack-gate used in a non-volatile memory has inducing charges to store the signal "1" in the memory. Only a small amount of energy is required when the data in the memory has to be changed.
Please refer to FIG. 1. FIG. 1 is a sectional perspective diagram of a prior art stack-gate 20 of a non-volatile memory. The prior art stack-gate 20 is formed on a substrate 11 of a semiconductor wafer 10. The stack-gate 20 comprises a gate oxide layer 16 formed on the substrate 11 to be used as a gate insulating layer, a first gate conductive layer 18 formed on a predetermined region of the gate oxide layer 16, a dielectric layer 22 on the first gate conductive layer 18, and a second gate conductive layer 24 on the dielectric layer 22. The first gate conductive layer 18 and the second gate conductive layer 24 are made of poly-silicon. The first gate conductive layer 18 is used as a floating gate for storing charges. The second gate conductive layer 24 is used as a control gate for controlling data access. The dielectric layer 22 has an ONO (Oxide/Nitride/Oxide) structure in which a nitride oxide layer is sandwiched between two separate oxide layers.
When a high voltage is applied to the control gate (the second gate conductive layer 24) of the stack-gate 20, carrier multiplation occurs on the drain and hot electrons are generated. Some of the hot electrons transverse the gate oxide layer 16 and become injected into the floating gate (the first gate conductive layer 18) causing the floating gate to become charged. The charges from the hot electrons enter the floating gate secondary to contact with the dielectric layer 22 and gate oxide layer 16. In this way, data is stored.
In order to simplify the production process, the gate of the MOS transistor surrounding the non-volatile memory is formed at the same time the second gate conductive layer 24 of the stack-gate 20 is produced. In order to form the gate of the MOS transistor, a lithography process and resist stripping process must be performed prior to the production of the second gate conductive layer 24. In the ONO structure of the dielectric layer 22, the oxide layer on the surface is so thin that it is easily damaged by the resist stripping process. This affects performance of the dielectric layer 22 and may make the charges in the floating gate leak thereby reducing the data stability of the non-volatile memory.